Number Systems in Digital Design: Signed Arithmetic, Ones Complement and Twos Complement

Binary Number Systems in Digital Design

Binary numbers are at the heart of digital logic, but representing signed (positive and negative) numbers requires special encoding. Three systems commonly used in FPGAs, microprocessors, and digital circuits are signed magnitude, ones complement, and twos complement. Each has unique properties impacting arithmetic, hardware complexity, and software compatibility.

Signed Magnitude

Signed magnitude is the most intuitive method. Here, the most significant bit (MSB) indicates the sign: 0 for positive, 1 for negative. The remaining bits represent the absolute value (magnitude) of the number.

Example (4-bit):

• +5 = 0101
• –5 = 1101

Advantages:

• Simple to understand for humans.
• Easy to negate (just flip the sign bit).
• Direct separation of sign and magnitude.

Disadvantages:

• Two zeros: 0000 (+0) and 1000 (–0), which complicates hardware logic and software comparisons.
• Complex arithmetic: Addition and subtraction require separate logic to handle signs and magnitudes, increasing hardware complexity.
• Range: For n bits, range is -2^n-1 to +2^n-1. For 4 bits: –7 to +7.

Ones Complement

In ones complement, positive numbers are represented as in unsigned binary, while negatives are formed by inverting all bits (including the sign bit) of the corresponding positive number.

Example (4-bit):

• +3 = 0011
• –3 = 1100 (flipped 0011)

Advantages:

• Easy negation: Just invert all bits1.
• Addition: Simple circuit using inverters for negation1.
• Range: Same as signed magnitude: –7 to +7 for 4 bits.

Disadvantages:

• Still two zeros: 0000 (+0) and 1111 (–0), leading to similar problems as signed magnitude.
• End-around carry: Addition may require a carry to loop back, complicating hardware.
• Arithmetic: Not as streamlined as twos complement.

Twos Complement

Twos complement is the de facto standard in modern computing. Positive numbers are represented as normal. Negatives are formed by inverting all bits and adding 1 to the least significant bit (LSB).

Example (4-bit):

• +3 = 0011
• –3: Invert (0011 → 1100), add 1 = 1101

Advantages:

• One zero: Only 0000 represents zero, eliminating ambiguity.
• Efficient arithmetic: Addition and subtraction use the same hardware, with no need for extra sign logic.
• Simplified hardware: Circuits are smaller and faster.
• Larger range: For n bits, range is -2^n-1 to +(2^n-1 - 1). For 4 bits: –8 to +7.
• Integer overflow: Wraps naturally, which simplifies boundary conditions.

Disadvantages:

• Negation: Slightly more complex due to the “add 1” step.
• Least negative value: 1000 (for 4 bits) is –8, which does not have a positive counterpart in the same bit width.

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Comparison Table

Feature	Signed Magnitude	Ones Complement	Twos Complement
Zero Representation	Two (+0, –0)	Two (+0, –0)	One (0)
Negation	Flip sign bit	Flip all bits	Flip all bits, add 1
Addition Logic	Complex (sign handling)	End-around carry	Standard, no special steps
Range (4-bit)	–7 to +7	–7 to +7	–8 to +7
Hardware Cost	High	Moderate	Low
Use	Rare	Historical/rare	Universal

Preference for Twos Complement

Twos complement is preferred in virtually all modern digital systems, including FPGAs, because it eliminates redundant zero, simplifies arithmetic, and reduces hardware complexity. This makes it faster, smaller, and more reliable—critical for performance and power-sensitive embedded designs.

Signed magnitude is mostly of historical or educational interest, while ones complement survives mainly in legacy systems due to its simple negation logic.

Practical Implications for FPGA Design

When designing digital circuits in VHDL, Verilog, or with FPGA tools:

• Use twos complement for all arithmetic operations.
• Understand overflow: In twos complement, adding two large positives can produce a negative, and vice versa—this is intentional and must be accounted for in your logic.
• Conversion: When interfacing with external systems, be aware of the number system used to avoid misinterpretation.