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# Design Question - Barrel Shifter
- URL: https://fpgadesign.io/blog/design-question-barrel-shifter/
- Published: 2025-04-26T18:54:42.000Z
- Updated: 2026-05-18T00:11:50.000Z
- Description: What is a Barrel Shifter? How does it compare to a Shift Register? All concepts explained along with the SystemVerilog code for a 4-bit Barrel Shifter.
- Author: Milind Parelkar
- Tags: Design Questions

💡

****Question:** **What is a Barrel Shifter and how does it compare to a Shift Register?*

A barrel shifter is a ***combinatorial shifter*** that can shift its input data by a specified number of bit positions in a single clock cycle. It is extremely fast, as it can, in theory, perform an n-bit shift operation in a single clock cycle.

On the other hand, a shift-register is a ***sequential circuit*** that can perform a one-bit shift per clock cycle. A shift-register requires n clock cycles to perform an n-bit shift operation.

💡

****Question:** **What are the downsides of a Barrel Shifter in terms of design performance?*

The high speed of the barrel shifter comes at a cost of increased resource utilization, additional congestion and reduced clock speeds. A single clock cycle shift requires a large number of multiplexers. The number of inputs to these muxes grow as the number of input bits to be shifted increase.

💡

****Question:** **Write the RTL code for a 4-bit Left Shift Barrel Shifter?*

The complete RTL code for this block can be found [here](https://gist.github.com/milindparelkar/623a30f0459982755b4f30677aafec5c?ref=fpgadesign.io).  
The main element of the Barrel Shifter is the combinatorial multiplexer which lists out all possible shift combinations.

```Verilog
// Use the shift distance (shf_dst)
// to left shift the input data 
always_comb
begin
   case (shf_dst)
      // No shift
      2'b00  : sig_dat_out = dat_in;

      // 1-bit shift
      2'b01  : sig_dat_out = {dat_in[2:0], 1'b0};

      // 2-bit shift
      2'b10  : sig_dat_out = {dat_in[1:0], 2'b0};

      // 3-bit shift
      3'b11  : sig_dat_out = {dat_in[  0], 3'b0};

      // default
      default : sig_dat_out = dat_in;
   endcase
end
```

Barrel Shifter

**Additional Questions -**

1. What modifications are needed if the module needs to do Rotation instead of Shifting?
2. Design a Barrel Shifter when has a Left Shift as well as Right Shift functionality based on an additional input signal.
3. In a Xilinx FPGA, how can you implement a barrel shifter using DSP48s?

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